RESEARCH PROGRAM IN DEVELOPMENT

Quantum LDPC Decoding

Real-time decoders are the classical bottleneck of fault-tolerant quantum computing. We are building an FPGA Relay belief-propagation decoder for bivariate-bicycle codes (the code family behind IBM's [[144,12,12]] "gross" code), using the same verified-generation flow as our classical LDPC products.

STATUS

Where the program stands

We publish progress the same way we publish products: measured, or labeled as a target.

MilestoneStatus
Floating-point golden model of Relay-BP (relay legs, ensemble, disordered memory strengths), exact against the published algorithmDONE MEASURED
Convergence on circuit-level depolarizing noise, windowed decoding matrix (1008 checks × 8785 error mechanisms)100/100 trials MEASURED
Pipelined BP iteration on FPGA, small-scale (2-cycle check/bit update)118 MHz MEASURED
Mid-scale distance-5 decoder, fully parallel, placed and routed (xcvu9p)476,318 LUT · ~85.7 MHz MEASURED
Early termination on a stalled belief, worst-case decode latency-32% at +0.47% LUT MEASURED
Model vs RTL bit-exactness, every test vector0 LSB MEASURED
Published FPGA reference at gross scale (for context)~2.1M LUT · 83 MHz
Full gross-code real-time decoder, fixed-point, system integrationTARGET

The distance-5 clock is bounded by wiring, not logic, so it lands on the published silicon envelope rather than beating it. The genuine headroom is algorithmic. The full optimization journey is in the case study, with the circuit-level detail in the technical report. An honest negative result, because they matter: a fully parallel decoder at full gross-code scale does not fit synthesizable resource budgets. Our folded dataflow reconstruction is bit-exact and is the path forward.

WHY US

Classical discipline, quantum problem

Same family, harder code

Quantum LDPC decoding is belief propagation on a quasi-cyclic code, exactly the structure our 5G NR and CCSDS generators already emit, verify, and timing-close. The quantum program reuses that proven machinery.

Bit-exact or it does not ship

Decoder logical-error rates are statistical claims; they are only credible if the hardware is provably the same algorithm as the model that produced the curves. Our three-layer equivalence chain guarantees exactly that.

Partner with the program

We are open to collaborations with quantum-hardware teams that need real-time decoding: co-development, evaluation on your syndrome streams, or a custom code family.

Start a conversation